Certus Semiconductor, a leading provider of custom I/O and ESD Solutions to the semiconductor industry, is announcing an official partnership to join the TSMC Intellectual Property (IP) Alliance program, a key element of the TSMC Open Innovation Platform® (OIP).
Certus Semiconductor, a leading provider of custom I/O and ESD solutions, specializes in high-performance ESD solutions for many RF and high-speed interfaces, including WiFi, Cellular, HDMI, LVDS, USB, XAUI, and up to 256Gb SerDes. Certus offers flexible multi-voltage GPIO and ODIO solutions supporting diverse protocols alongside high-voltage structures (10V, 20V+) on low-voltage CMOS for advanced applications. Certus optimizes its I/O Libraries for automotive, aerospace, and radiation environments.
Certus provides cutting-edge IP across multiple foundries:
- Multi-protocol and multi-voltage I/O libraries
- GPIOs supporting a broad range of industry standards and extended specifications
- High-speed die-to-die solutions
- High-Voltage (>10V) ESD protection in 65nm and below nodes
- Explore our IP offerings via the links below.
"For 16 years, Certus has worked indirectly with TSMC to provide the best I/O and ESD solutions to our customers," said Stephen Fairbanks, CEO and CTO of Certus Semiconductor, "We are excited to officially partner with TSMC and provide our solutions to their entire OIP ecosystem."
“Adding Certus Semiconductor’s IP solutions to the OIP ecosystem will provide our mutual customers with a more comprehensive, proven IP portfolio optimized for our industry-leading process technologies,” said Lipen Yuan, Senior Director of Advanced Technology Business Development at TSMC. “We look forward to collaborating with our OIP partners like Certus Semiconductor to enhance design reliability and accelerate product innovations through our combined expertise.”
Certus Semiconductor IP solutions prioritize robustness, noise reduction, distortion control, low capacitance, and enhanced ESD performance. Certus has multiple solutions that have met automotive-grade requirements and radiation-hardened IP testing in nodes from 180nm to 16/12nm. It looks forward to addressing industry needs in TSMC's advanced processes.